Get Up to 95% off laptops, electronics, jewelry, and even cash

Get Up to 95% off laptops, electronics, jewelry, and even cash at Zeekler Penny Auctions with Our Silver Preferred Customer Program at only $50/mo and 100 bids/mo worth $1 each. https://www.zeekler.com/securesignup.asp?username=imranwtwo

VU Search Help Matrial

This post confirms my ownership of the site and that this site adheres to Google AdSense program policies and Terms and Conditions

<p>This post confirms my ownership of the site and that this site adheres to Google AdSense program policies and Terms and Conditions.</p>

cs401 More Solved Papers

Question No: 1 ( Marks: 1 ) - Please choose one

When a 32 bit number is divided by a 16 bit number, the quotient is of

·    32 bits·    16 bits·    8 bits·    4 bits

Question No: 2 ( Marks: 1 ) - Please choose one

In the instruction MOV AX, 5 the number of operands are     1  2   3    4

3. In DOS input buffer , number of characters actually read on return is stored in

·      First byte·      Second byte·      Third byte·      Fourth byte 

Question No: 4 ( Marks: 1 ) - Please choose one

7. VESA VEB 2.0 is standard for

·    High Resolution Mode·    Low Resolution Mode·    Very High Resolution ode

·    Medium Resolution Mode

22. IN DB-9 connector the Data Set ready pin is at  5   6   7  8

Threads can have function calls, parameters and                      variables.

·      global·      local·      legal·      illegal

 How many prevalent calling conventions do exist    1   2   3   4

 In 9pin DB 9 DSR is assigned on pin number    4   5   6   7

In 9pin DB 9 CTS is assigned on pin number    6   7  8  9

In 9pin DB 9 CD is assigned on pin number    1    2   3   4

A 32bit address register can access upto ............................of memory so memory

access has increased a lot.   ·    2GB·    4GB·    6GB·    8GB 

in device attribute word which of the following bit decides whether it is a charater device or a block device    ·      Bit 12·      Bit 13·      Bit 14·      Bit 15 

9. Which of the following IRQ is cascading interrupt    ·    IRQ 0·    IRQ 1·    IRQ 2·    IRQ 3

Which of the following interrupts is used for Arithmetic overflow   INT 1·      INT 2·      INT 3·      INT 4 

An End of Interrupt (EOI) signal is sent by     Handler·      Processor      IRQ·      PIC 

The number of pins in a parallel port connector are?     20    25    30    35 

Which of the following pins of a parallel port connector are grounded?  ·      10-18·      18-25·   25-32   32-39

 A 32bit address register can access upto .......................... of memory so memory access has increased a lot.

·      2GB·      4GB·      6GB·      8GB

 9 Pin Serial connector is called·      DB-7·      DB-9·      DB-25·      9DB-5

In NASM an imported symbol is declared with the ............................ while and exported symbol is declared with the ............................ ·      Global directive, External directive·      External directive, Global irective·      Home Directive, Foreign Directive·      Foreign Directive, Home Directive 

Write brief about INT 13 – Extended READ SERVICES

What is Interrupt flag?

 Give the name of any two descriptors

 It is the part of Multitasking TSR caller, what will do these instructions comment against them (3)

Mov al, [chars+bx] Mov [es:40],al

Inc bx

 Write Data Movement and Arithmetic Instructions of Motorola 68 K Processor.

 Write assembly program for “Break Interrupt Service Routine”

Write down purpose of JNZ instruction? (2)
How many bytes floppy root directory entry has? (2)
Write the programmer view of processor? (2)
What is scheduler? (2)
Write the names of any two descriptor? (3)

Media Check

Build BPB
Define the protected mode? (3)
Write the algorithm of multiplication of two 4 bits number? (3)
How threads are register in the scheduler? (3)

When the program is executed the threads display the numbers independently. However as keys are pressed and new threads are registered,

INT 14 serial with character to port (5)
AH=………………
AL=……………..
AX=………………
Define the debugger. How to run the debugger tell the command, and all its parts? (5)
Write the code of “break point interrupt routine”? (5)
Describe the format of interrupt descriptor? (5)

Suppose AL contains 5 decimal then after two left shifts produces the value as  ► 5  ► 10  ► 15 ► 20

In graphics mode a location in video memory corresponds to a _____ on the screen.►line►dot► circle► rectangle

Creation of threads can be        ► static       ► dynamic        ► easy       ► difficult

 The thread registration code initializes the PCB and adds it to the linked list so that the __________ will give it a turn.       ► assembler        ► scheduler        ► linker       ► debugger

 VESA VBE 2.0 is a standard for        ► High resolution Mode       ► Low resolution Mode       ► Medium resolution Mode       ► Very High resolution Mode

  Which of the following gives the more logical view of the storage medium ►BIOS ►DOS  ► Both None

 Which of the following IRQs is derived by a key board?       ► IRQ 0       ► IRQ 1    ► IRQ 2   ► IRQ 3

Which of the following IRQs is used for Floppy disk derive?        ► IRQ 4 ► IRQ 5► IRQ 6   ► IRQ 7

 Which of the following pins of a parallel port connector are grounded?►10-18►18-25►25-32 ► 32-39   

 The physical address of IDT( Interrupt Descriptor Table) is stored in ___ GDTR IDTR  IVT ► IDTT   

 In NASM an imported symbol  is declared with the ............................ while and exported symbol is declared with the ............................       ► Global directive, External directive    ► External directive, Global directive       ► Home Directive, Foreign Directive       ► Foreign Directive, Home Directive

 In 68K processors there is a ........................ program counter (PC) that holds the address of currently executing instruction       ► 8bit       ► 16bit       ► 32bit       ► 64bit

 To reserve 8-bits in memory ___ directive is used.       ► db       ► dw       ► dn       ► dd   

 In the “mov ax, 5”     5 is the __________ operand.  ► source ► destination ► memory ► register

 RETF will pop the segment address in the ► CS register► DS register► SS register ► ES register

 For the execution of the instruction “DIV  BL”, the implied dividend will be stored inAX BX CX DX   

 When a number is divided by zero ”A Division by 0” interrupt is generated. Which instruction is used for this purpose       ► INT 0       ► INT 1       ► INT 2       ► This interrupt is generated automatically

 INT 21 service 01H is used to read character from standard input with echo. It returns the result in  ______ register.

       ► AL        ► BL        ► CL        ► BH   

 BIOS sees the disks as► logical storage  ► raw storage► in the form of sectors only► in the form of

In 9pin DB 9, which pin number is assigned to CD (Carrier Detect) ?       ► 1       ► 2       ► 3       ► 4

 In 9pin DB 9, Signal ground is assigned on pin number       ► 4       ► 5       ► 6       ► 3

 In 9pin DB 9, RI (Ring Indicator) is assigned on pin number       ► 6       ► 7       ► 8       ► 9

   Motorola 68K processors have ....................... 23bit general purpose registers.  ► 4 ► 8  ► 16  ► 32

 When two devices in the system want to use the same IRQ line then what will happen?

  An IRQ Collision        ► An IRQ Conflict        ► An IRQ Crash        ► An IRQ Blockage

  In the instruction  MOV AX, 5 the number of operands are       ► 1       ► 2       ► 3       ► 4

 Which flags are NOT used for mathematical operations ?► Carry, Interrupt and Trap flag.  ► Direction, Interrupt and Trap flag.  ► Direction, Overflow and Trap flag.      ► Direction, Interrupt and Sign flag.

   

 How can we improve the speed of multitasking?

We can improve the speed of multitasking by changing the frequency of timer interrupt.

 Write instructions to do the following. Copy contents of memory location with offset 0025 in the current data segment into AX.

 Mov ax , [0025]

 mov[0fff], ax

 mov  ax , [0010]

 mov [002f] , ax

 Write types of Devices?

There are two types devices used  in pc.

1. Input devices(keyboard, mouse,)
2. Output devices.(monitor, printer)

 What dose descriptor 1st 16 bit tell?

Each segment is describe by the descriptor like base, limit, and attributes, it  basically define the actual base address.

 List down any three common video services for INT 10 used in text mode.

 INT 10 - VIDEO - SET TEXT-MODE CURSOR SHAPE

 AH = 01h

 CH = cursor start and options

 CL = bottom scan line containing cursor (bits 0-4)

 How to create or Truncate File using INT 21 Service?

 INT 21 - TRUNCATE FILE

 AH = 3Ch

 CX = file attributes

 DS:DX -> cs401 filename

 Return: 

 CF = error flag

 AX = file handle or error code

 How many Types of granularity also name them?

There are three types 1.Data Granularity   2.Business Value Granularity  3.Functionality Granularity

How to read disk sector into memory using INT 13 service?

INT 13 - DISK - READ SECTOR(S) INTO MEMORY :

AH = 02h

AL = number of sectors to read (must be nonzero)

CH = low eight bits of cylinder number

CL =                sector number 1-63 (bits 0-5)

                          high two bits of cylinder (bits 6-7, hard disk only)

DH = head number

DL = drive number (bit 7 set for hard disk)

ES:BX -> data buffer

  

Return: 

CF = error flag

AH = error code

AL = number of sectors transferred

   

The program given below is written in assembly language. Write a program in C to call this assembly routine.

[section .text]

global        swap

swap:        mov  ecx,[esp+4]      ; copy parameter p1 to ecx

                  mov  edx,[esp+8]      ; copy parameter p2 to edx

                  mov  eax,[ecx]           ; copy *p1 into eax

                  xchg eax,[edx]           ; exchange eax with *p2

                  mov  [ecx],eax           ; copy eax into *p1

                  ret                               ; return from this function

  Ans:

The above code will assemble in c through this command. Other aurwise error will occur.

Nasm-f win32 swap .asm

This command will generate swap.obj file.

The code for given program will be as follow.

#include <stdio.h>

Void swap(int* pl, int* p2);

Int main()

{

      Int a=10,

      Int b= 20;

Print f (“a=%d b=%d\n” , a ,b);

Swap (&a ,&b);

Print f (“a=%d b=%d\n” , a ,b);

System ( “pause”);

Return 0;

}

 Write the code of “break point interrupt routine”.

Breakpoint interrupts service routine :

debugISR:          push bp

              mov  bp, sp             ; …………….to read cs, ip and flags

              push ax

              push bx

              push cx

              push dx

              push si

              push di

              push ds

              push es

              sti                     ;…………………….. waiting for keyboard interrupt

              push cs

              pop  ds                 ;…………………… initialize ds to data segment

              mov  ax, [bp+4]         

              mov  es, ax             ; ………………….load interrupted segment in es

              dec  word [bp+2]        ; ……………….decrement the return address

              mov  di, [bp+2]         ;………………… read the return address in di

              mov  word [opcodepos], di ;…………. remember the return position

              mov  al, [opcode]       ; …………..load the original opcode

              mov  [es:di], al        ;………….. restore original opcode there

              mov  byte [flag], 0     ; …………set flag to wait for key

              call clrscr             ;……………. clear the screen

              mov  si, 6              ; …………..first register is at bp+6

              mov  cx, 12             ;………… total 12 registers to print

              mov  ax, 0              ; …………..start from row 0

              mov  bx, 5              ; ………….print at column 5

          push ax                 ; ………………..row number

              push bx                 ;………………. column number 

              mov  dx, [bp+si]

              push dx                 ;………………. number to be printed

              call printnum           ;…………….. print the number

              sub  si, 2              ; ……………….point to next register 

              inc  ax                 ; ………………..next row number 

              loop l3                 ; ……………….repeat for the 12 registers

              mov  ax, 0              ; ………………..start from row 0

              mov  bx, 0              ; ………………..start from column 0

              mov  cx, 12             ; …………………..total 12 register names

              mov  si, 4              ;……………………. each name length is 4 chars

              mov  dx, names          ; …………………..offset of first name in dx

              push ax                 ;………………………. row number 

              push bx                 ; ………………………column number 

              push dx                 ; ……………………….offset of string

              push si                 ; ………………………….length of string

              call printstr           ; ………………………….print the string

              add  dx, 4              ;………………………….. point to start of next string 

              inc  ax                 ; ……………………………new row number

              loop l1                 ;…………………………….. repeat for 12 register names

              or word [bp+6], 0x0100  ; ……………………set TF in flags image on stack

keywait:      cmp  byte [flag], 0     ;……………………. has a key been pressed

              je   keywait            ;            ………………….. no, check again

              pop es

              pop ds

              pop di

              pop si

              pop dx

              pop cx

              pop bx

              pop ax

              pop bp

              iret

start:        xor  ax, ax

              mov  es, ax             ;            ……………………point es to IVT base

              mov  word [es:1*4], trapisr ;…………………. store offset at n*4

              mov  [es:1*4+2], cs     ;      …………………...store segment at n*4+2

              mov  word [es:3*4],            …………………..debugisr ; store offset at n*4

              mov  [es:3*4+2], cs     ;      …………………..store segment at n*4+2

              cli                     ;                  ………………….disable interrupts

              mov  word [es:9*4], kbisr ; ………………….store offset at n*4

              mov  [es:9*4+2], cs     ; ……………………...store segment at n*4+2

              sti                     ;             ………………………enable interrupts

To transfer control back the RET instruction take  1 argument 2 argument 3 arguments No arguments

In STOSB instruction SI is decremented or incremented by 4 1 2 3  

CMPS instruction subtracts the source location to the destination location. Destination location always lies in     DS:SI DS:DI  ES:SI  ES:DI

Regarding assembler, which statement is true:

Assembler converts mnemonics to the corresponding OPCODE  

Assembler converts OPCODE to the corresponding mnemonics.

 Assembler executes the assembly code all at once   Assembler executes the assembly code step by step

Iof “BB” is the OPCODE of the instruction which states to “move a constant value to AX register”, the hexadecimal representation (Using little Endian notation) of the instruction “Mov AX,336” (“150” in hexadecimal number system) will be:

0xBB0150 0x5001BB 0x01BB50 0xBB5001

In the instruction  MOV AX, 5 the number of operands are    1 2 3 4

the maximum parameters a subroutine can receive (with the help of registers) are 6   7 8 9

In assembly the CX register is used normally as a ______________register.

 ource counter index pointer

 All the addressing mechanisms in iAPX 8 8 return a number called _ _ _ _ _ _ _ _ _ _ _ _ _ address .

 effective faulty indirect direct

When a 16 bit number is divided by an 8 bit number, the dividend will be in  AX       BX      CX     DX

 in Left-Shift-Operation the left most bit _______  will drop will go into CF Will come to the right most 

Suppose the decimal number "35" after shifting its binary two bits to left, the new value becomes _________       35 70 140 17

Which mathematical operation is dominant during the execution of SCAS instruction

 Division  Multiplication  Addition  Subtraction

After the execution of REP instruction CX will be decremented then which of the

following flags will be affected?   CF OF DF No flags will be affected

What is difference between SHR and SAR instructions?

SHR   The SHR inserts a zero from the left and moves every bit one position to the right and copy the rightmost bit in the carry flag.

SAR  The SAR shift every bit one place to the right with a copy of the most significant bit left at the most significant place. The bit dropped from the right is caught in the carry basket. The sign bit is retained in this operation.

 For what purpose "INT 1" is reserved ?

 Define implied operand?

   It is always in a particular register say the accumulator. It needs to not be mentioned in the instruction.

 Serial Port is also accessible via       I/O      ports ,        COM 1     is accessible via ports 3F8-3FF while     COM 2     is accessible via 2F8 -2FF.

The first register at 3F8 is the    Transmitter   holding register if written to and the receiver    buffer   register if read from.

Other register of our interest include 3F9 whose      Bit  0   must be set to enable received data available interrupt and    Bit    1     must be set to enable transmitter holding register empty interrupt.

(Transmitter, COM 1, I/O ports , COM2. bit 0 , Buffer , 3FA)

There are three busses to communicate the processor and memory named as _____________
1) : address bus.,data bus and data bus.
2) : addressing bus.,data bus and data bus.
3) : address bus.,datamove bus and data bus.
4) : address bus.,data bus and control bus..


The address bus is unidirectional and address always travels from processor to memory.
1) : TRUE
2) : FALSE


Data bus is bidirectional because________
1) : To way
2) : Data moves from both, processor to memory and memory to processor,
3) : Data moves from both, processor to memory and memory to data Bus,
4) : None of the Given

Control bus________    1) : is Not Important. 2) : is Important . 3) : bidirectional.  4: unidirectional .
A memory cell is an n-bit location to store data, normally ________also called a byte
1) : 4-bit 2) : 8-bit  3) : 6-bit 4) : 80-bit 
The number of bits in a cell is called the cell width.______________ define the memory completely.   1) : Cell width and number of cells,   2) : cell number and width of the cells,
3) : width   4) : Height
for memory we define two dimensions. The first dimension defines how many __________bits are there in a single memory cell.   1) : parallel 2) : Vertical 3) : long 4) : short  Question # 8
__________ operation requires the same size of data bus and memory cell width.
1) : Normal  2) : Best and simplest 3) : first 4) : None of the Given Correct Option :
Control bus is only the mechanism. The responsibility of sending the appropriate signals on the control bus to the memory is of the____. 1) :Data Bus 2) : processor 3) :Address Bus 4) :None
In “total: dw 0 ” Opcode total is a ___________
1) : Literal  2) : Variable 3) : Label 4) : Starting point

| 0 |--›| 1 | 1 | 0 | 1 | 0 | 0 | 0 | --›| C | is a example of ______ 1) : Shl 2) : sar 3) : Shr 4) : Sal
| C |‹--| 1 | 1 | 0 | 1 | 0 | 0 | 0 | ‹--| 0 | is a example of ______ 1) : Shl 2) : sar 3) : Shr 4) : Sal

ADC has _________ operands. 1) : two 2) : three 3) : Five 4) : Zero  Question # 14
The basic purpose of a computer is to perform operations, and operations need ____________.
1) : order 2) : nothing 3) : operands 4) : bit 
Registers are like a scratch pad ram inside the processor and their operation is very much like normal______________.     1) : Number 2) : opreations 3) : memory cells 4) : None of the Given
There is a central register in every processor called the _______ and The word size of a processor is defined by the width of its__________.   1) : accumulator,accumulator 2) : data bus,accumulator 3) : accumulator, Address Bus 4) : accumulator,memory
___________does not hold data but holds the address of data  1) : Pointer, Segment, or Base Register  2) : Pointer, Index, or Base Register 3) : General Registers 4) : Instruction Pointer
“The program counter holds the address of the next instruction to be _____________”
1) : executed.   2) : called 3) : deleted 4) : copy
There are _____ types of “instruction groups”    1) : 4    2) : 5     3) : 3    4) : 2
These instructions are used to move data from one place to another. 1) : TRUE 2) : FALSE
Correct Option : 1 From : Lecture 2
“mov” instruction is related to the _______ *****.  1) : Arithmetic and Logic Instructions
2) : Data Movement Instructions  3) : Program Control Instructions  4) : Special Instructions

______________allow changing specific processor behaviors and are used to play with it.
1) : Special Instructions  2) : Data Movement Instructions 3) : Program Control Instructions
4) : Arithmetic and Logic Instructions 

8088 is a 16bit processor with its accumulator and all registers of __________.
1) : 32 bits     2) : 6 bits     3) : 16 bits        4) : 64 bits    Correct Option : 3 From : Lecture 2

The __________ of a processor means the organization and functionalities of the registers it contains and the instructions that are valid on the processor.
1) : Manufactures    2) : architecture     3) : Deal     4) : None of the Given    Correct Option : 2
Intel IAPX88 Architecture is ___________
1) : More then 25 old  2) : New 3) : Not Good 4) : None of the Given Correct Option : 1
 The iAPX88 architecture consists of______registers.        1) : 13        2) : 12       3) : 9      4) : 14
General Registers are ______________  /1) : AX, BX, CX, and DX  2) : XA, BX, CX, and DX 3) : SS,SI and DI 4) : 3
AX means we are referring to the extended 16bit “A” register. Its upper and lower byte are separately accessible as ________________.  1) : AH and AL 2) : A Lower and A Upper
3) : AL, AU 4) : AX
AX is General purpose Register where A stands for____Acadmic Ado Architecture Accumulator

The B of BX stands for _________because of its role in memory addressing.
1) : Busy   2) : Base 3) : Better 4) : None of the Given

The D of DX stands for Destination as it acts as the destination in _____________________.
1) : I/O operations   2) : operations 3) : memory cells 4) : Memory I/O operations
The C of CX stands for Counter as there are certain instructions that work with an automatic count in the ___________.   1) : DI register 2) : BX register 3) : CX register 4) : DX register
_________are the index registers of the Intel architecture which hold address of data and used in memory access.   1) : SI and SS 2) : PI and DI 3) : SI and IP 4) : SI and DI
In Intel IAPX88 architecture ___________ is the special register containing the address of the next instruction to be executed.   1) : AX    2) : PI     3) : IP    4) : SI
SP is a memory pointer and is used indirectly by a set of ____________.
1) : instructions  2) : Pointers 3) : Indexes 4) : Variables
___________is also a memory pointer containing the address in a special area of memory called the stack.    1) : SP 2) : BP 3) : PB 4) : AC
____________is bit wise significant and accordingly each bit is named separately.
1) : AX     2) : FS         3) : IP        4) : Flags Register   
When two 16bit numbers are added the answer can be 17 bits long, this extra bit that won’t fit in the target register is placed in the __________where it can be used and tested
1) : carry flag       2) : Parity Flag      3) : Auxiliary Carry     4) : Zero Flag

Program is an ordered set of instructions for the processor.   1) : TRUE    2) : FALSE
For Intel Architecture “operation destination, source” is way of writing things.
1) : TRUE  2) : FALSE 
Operation code “ add ax, bx ” ____________.    1) : Add the bx to ax and change the bx
2) : Add the ax to bx and change the ax   3) : Add the bx to ax and change the ax
4) : Add the bx to ax and change nothing
The maximum memory iAPX88 can access is________. 1) : 1MB 2) : 2MB 3) : 3MB  4) :128MB

The maximum memory iAPX88 can access is 1MB which can be accessed with _________.           1) : 18 bits    2) : 20 bits  3) : 16 bits 4) : 2 bits
_____________address of 1DED0 where the opcode B80500 is placed.
1) : physical memory    2) : memory 3) : efective 4) : None of the Given
16 bit of Segment and Offset Addresses can be converted to 20bit Address i.e
Segment Address with lower four bits zero + Offset Address with ______ four bits zero = 20bit Physical Address   1) : Middle 2) : lower 3) : Top 4) : upper
When adding two 20bit Addresses a carry if generated is dropped without being stored anywhere and the phenomenon is called address______.  1) : wraparound
2) : mode 3) : ping 4) : error
segments can only be defined a 16byte boundaries called _____________ boundaries.
1) : segment   2) : paragraph 3) : Cell 4) : RAM 
in a Program CS, DS, SS, and ES all had the same value in them. This is called _____ overlapping segments  ___.  
“db num1” size of the memory is ____1byte ____  

“ 1------------[org 0x0100]
2------------mov ax, [num1] ; load first number in ax
3------------mov bx, [num2] ; load second number in bx
4------------add ax, bx ; accumulate sum in ax 

In “ mov ax, bx ” is ___4) : Register  ___ Addressing Modes. 
Question # 52
In “mov ax, [bx] ” is __ Based Register Indirect  __ Addressing Modes

In “mov ax, 5 ” is __ Immediate  __ Addressing Modes
In “ mov ax, [num1+bx] ” is ___ BASEd REGISTER + OFFSET  __ ADDRESSING
“base + offset addressing ” gives This number which came as the result of addition is called the ___ effective address  __. 
“mov ax, [cs:bx]” associates ___ BX with CS  __ for this one instruction 
In “ mov [1234], al ” is ____ Direct  ___ Addressing Modes.
In “ mov [SI], AX ” is ___ Indexed Register Indirect  ___ Addressing Modes.
In “ mov ax, [bx - Si] ” is __ illegal ____ ADDRESSING
In “ mov ax, [BL] ” there is error i.e. __8 bit to 16 bit move illegal  __
In “ mov ax, [SI+DI] ” there is error i.e. __ Two indexes can’t use as Memory Address  ____
In JNE and JNZ there is difference for only ____ Programmer or Logic  ___;
JMP is Instruction that on executing take jump regardless of the state of all flags is called_________ Conditional jump  ___ 
When result of the source subtraction from the destination is zero, zero flag is set i.e. ZF=1
its mean that;   ____ DEST = SRC ______
When an unsigned source is subtracted from an unsigned destination and the destination is smaller, borrow is needed which sets the ____ carry flag i.e CF = 1 __.
In the case of unassigned source and destination when subtracting and in the result ZF =1 OR CR=1 then __ UDEST ? USRC  __
In the case of unassigned source and destination when subtracting and in the result ZF =0 AND CR=0 then ___ UDEST > USRC  ___
In the case of unassigned source and destination when subtracting and in the result CR=0 then ___ UDEST ? USRC  __

__ Jump if zero(JZ)/Jump if equal(JE) __This jump is taken if the last arithmetic operation produced a zero in its destination. After a CMP it is taken if both operands were equal.
___ JNA(Jump if not above)/JBE(Jump if not below or equal _This jump is taken after a CMP if the unsigned source is smaller than or equal to the unsigned destination.
Numbers of any size can be added using a proper combination of ___ ADD and ADC  ____. 
Like addition with carry there is an instruction to subtract with borrows called____ SBB  _. 
Question # 3
if “and ax, bx” instruction is given, There are _____________ operations as a result
1) : 16 AND
2) : 17 AND
3) : 32 AND
4) : 8 AND
Correct Option : 1 From : Lecture 12

Question # 4
____________can be used to check whether particular bits of a number are set or not.
1) : AND
2) : OR
3) : XOR
4) : NOT
Correct Option : 1 From : Lecture 12

Question # 5
__________can also be used as a masking operation to invert selective bits.
1) : AND
2) : OR
3) : XOR
4) : NOT
Correct Option : 3 From : Lecture 12

Question # 6
Masking Operations are Selective Bit _____ Clearing, Setting, Inversion and Testing  _______
1) : Clearing, XOR, Inversion and Testing
2) : Clearing, Setting, Inversion and Testing
3) : Clearing, XOR, AND and Testing
4) : None of the Given
Correct Option : 2 From : Lecture 12

Question # 7
The ____________ instruction allows temporary diversion and therefore reusability of code.
1) : CALL
2) : RET
3) : AND
4) : XOR
Correct Option : 1 From : Lecture 13

Question # 8
CALL takes a label as _____________ and execution starts from that label,
1) : argument
2) : Lable
3) : TXt
4) : Register
Correct Option : 1 From : Lecture 13

Question # 9
When the __________instruction is encountered and it takes execution back to the instruction following the CALL.
1) : CALL
2) : RET
3) : AND
4) : XOR
Correct Option : 2 From : Lecture 13

Question # 10
_______________________ Both the instructions are commonly used as a pair, however technically they are independent in their operation.
1) : RET and ADC
2) : Cal and SSb
3) : CALL and RET
4) : ADC and SSB
Correct Option : 3 From : Lecture 13

Question # 11
The CALL mechanism breaks the thread of execution and does not change registers, except ____________.
1) : SI
2) : IP
3) : DI
4) : SP
Correct Option : 2 From : Lecture 13

Question # 12
Stack is a ______ that behaves in a first in last out manner.
1) : Program
2) : data structure
3) : Heap
4) : None of the Given
Correct Option : 2 From : Lecture 14

Question # 13
If ____________ is not available, stack clearing by the callee is a complicated process.
1) : CALL
2) : SBB
3) : RET n
4) : None of the Given
Correct Option : 3 From : Lecture 14

Question # 14
When the stack will eventually become full, SP will reach 0, and thereafter wraparound producing unexpected results. This is called stack ________
1) : Overflow
2) : Leakage
3) : Error
4) : Pointer
Correct Option : 1 From : Lecture 14

Question # 15
The pop operation makes a copy from the top of the stack into its_______________.
1) : Register
2) : operand
3) : RET n
4) : Pointer
Correct Option : 2 From : Lecture 14

Question # 16
_______________decrements SP (the stack pointer) by two and then transfers a word from the source operand to the top of stack
1) : PUSH
2) : POP
3) : CALL
4) : RET
Correct Option : 1 From : Lecture 14

Question # 17
POP transfers the word at the current top of stack (pointed to by SP) to the destination operand and then __________ SP by two to point to the new top of stack.
1) : increments
2) : dcrements
3) : ++
4) : --
Correct Option : 1 From : Lecture 14

Question # 18
The trick is to use the ________and ___________operations and save the callers’ value on the stack and recover it from there on return.
1) : POP, ADC
2) : CALL, RET
3) : CALL, RET n
4) : PUSH, POP
Correct Option : 4 From : Lecture 14

Question # 19
To access the arguments from the stack, the immediate idea that strikes is to __________ them off the stack.
1) : PUSH
2) : POP
3) : CALL
4) : Rrgister
Correct Option : 2 From : Lecture 15

Question # 20
push bp
we are ________________
1) : sending bp copy to stack
2) : making bp copy from stack
3) : pushing bp on the stack
4) : doing nothing
Correct Option : 3 From : Lecture 15

Question # 21
Local Variables means variables that are used within the ___________________
1) : Subroutine
2) : Program
3) : CALL
4) : Label
Correct Option : 1 From : Lecture 15

Question # 22
Standard ASCII has 128 characters with assigned numbers from ________.
1) : 1to 129
2) : 0 to 127
3) : 0 to 128
4) : None of the Given
Correct Option : 2 From : Lecture 16

Question # 23
When _______ is sent to the VGA card, it will turn pixels on and off in such a way that a visual representation of ‘A’ appears on the screen.
1) : 0x60
2) : 0x90
3) : 0x30
4) : 0x40
Correct Option : 4 From : Lecture 16

Question # 24
Which bit is refer to the Blinking of foreground character
1) : 6
2) : 7
3) : 5
4) : 3
Correct Option : 2 From : Lecture 16

Question # 25
Which bit is refer to the Intensity component of foreground color
1) : 4
2) : 5
3) : 3
4) : 7
Correct Option : 3 From : Lecture 16

Question # 26
Which bit is refer to the Green component of background color
1) : 1
2) : 5
3) : 3
4) : 7
Correct Option : 2 From : Lecture 16

Question # 27
Which bit is refer to the Green component of foreground color
1) : 1
2) : 5
3) : 3
4) : 7
Correct Option : 1 From : Lecture 16

Question # 28
String can be indicate bye given
1) : db 0x61, 0x61, 0x63
2) : db 'a', 'b', 'c'
3) : db 'abc'
4) : All of the above
Correct Option : 4 From : Lecture 16

Question # 29
The first form divides a 32bit number in DX:AX by its 16bit operand and stores the ___________ quotient in AX
1) : 16bit
2) : 17bit
3) : 32bit
4) : 64bit
Correct Option : 1 From : Lecture 17

Question # 30
The ___________ (division) used in the process is integer division and not floating point division.
1) : DIV instruction
2) : ADC instruction
3) : SSB instruction
4) : DIVI instruction
Correct Option : 1 From : Lecture 17

Question # 31
______________(multiply) performs an unsigned multiplication of the source operand and the accumulator.
1) : Multi
2) : DIV
3) : MUL
4) : Move
Correct Option : 3 From : Lecture 18

Question # 32
The desired location on the screen can be calculated with the following formulae.
1) : location = ( hypos * 80 + SP ) * 3
2) : location = ( hypos * 80 + slocation ) * 2
3) : location = ( hypos * 80 + epos ) * 2
4) : None of the Given
Correct Option : 3 From : Lecture 18

Question # 33
To play with string there are 5 instructions that are __________
1) : STOS, LODS, CMPS, SCAS, and MOVS
2) : MUL, DIV, ADD, ADC and MOVE
3) : SSB, ADD, CMPS, ADC, and MOVS
4) : None of the Given
Correct Option : 1 From : Lecture 18

Question # 34
_______transfers a byte or word from register AL or AX to the string element addressed by ES:DI and updates DI to point to the next location.
1) : LODS
2) : STOS
3) : SCAS
4) : MOVE
Correct Option : 2 From : Lecture 18

Question # 35
____________ transfers a byte or word from the source location DS:SI to AL or AX and updates SI to point to the next location.
1) : LODS
2) : STOS
3) : SCAS
4) : MOVE
Correct Option : 1 From : Lecture 18

Question # 36
_______compares a source byte or word in register AL or AX with the destination string element addressed by ES: DI and updates the flags.
1) : LODS
2) : STOS
3) : SCAS
4) : MOVE
Correct Option : 3 From : Lecture 18

Question # 37
____________ repeat the following string instruction while the zero flag is set and REPNE or REPNZ repeat the following instruction while the zero flag is not set.
1) : REP or REPZ
2) : REPE or REPZ
3) : REPE or RPZ
4) : RPE or REPZ
Correct Option : 2 From : Lecture 18

Question # 38
LES loads ______________
1) : ES
2) : DS
3) : PS
4) : LS
Correct Option : 1 From : Lecture 20

Question # 39
LDS loads_______.
1) : ES
2) : DS
3) : PS
4) : LS
Correct Option : 2 From : Lecture 20

Question # 40
REP allows the instruction to be repeated ____________ times allowing blocks of memory to be copied.
1) : DX
2) : CX
3) : BX
4) : AX
Correct Option : 2 From : Lecture 20

Question # 41
___________pops IP, then CS, and then FLAGS.
1) : Ret n
2) : REZA
3) : REPE
4) : IRET
Correct Option : 4 From : Lecture 21

Question # 42
________ , Trap, Single step Interrupt
1) : INT 0
2) : INT 1
3) : INT 3
4) : INT 0
Correct Option : 2 From : Lecture 21

Question # 43
_________,NMI-Non Maskable Interrupt
1) : INT 0
2) : INT 1
3) : INT 3
4) : INT 0
Correct Option : 3 From : Lecture 21

Question # 44
To hook an interrupt we change the _________ corresponding to that interrupt.
1) : SX
2) : vector
3) : AX
4) : BX
Correct Option : 2 From : Lecture 22
Question # 1
___________pops IP, then CS, and then FLAGS.
1) : Ret n
2) : REZA
3) : REPE
4) : IRET
Correct Option : 4 From : Lecture 21

Question # 2
________ , Trap, Single step Interrupt
1) : INT 0
2) : INT 1
3) : INT 3
4) : INT 0
Correct Option : 2 From : Lecture 21

Question # 3
_________,NMI-Non Maskable Interrupt
1) : INT 0
2) : INT 1
3) : INT 3
4) : INT 0
Correct Option : 3 From : Lecture 21

Question # 4
To hook an interrupt we change the _________ corresponding to that interrupt.
1) : SX
2) : vector
3) : AX
4) : BX

-===========================================================

Question # 1
There are three busses to communicate the processor and memory named
as _____________
1) : address bus.,data bus and data bus.
2) : addressing bus.,data bus and data bus.
3) : address bus.,datamove bus and data bus.
4) : address bus.,data bus and control bus..
Correct Option : 4 From : Lecture 1

Question # 2
The address bus is unidirectional and address always travels from
processor to memory.
1) : TRUE
2) : FALSE
3) :
4) :
Correct Option : 1 From : Lecture 1

Question # 3
Data bus is bidirectional because________
1) : To way
2) : Data moves from both, processor to memory and memory to processor,
3) : Data moves from both, processor to memory and memory to data Bus,
4) : None of the Given
Correct Option : 3 From : Lecture 1

Question # 4
Control bus________
1) : is Not Important.
2) : is Important .
3) : bidirectional.
4) : unidirectional .
Correct Option : 3 From : Lecture 1

Question # 5
A memory cell is an n-bit location to store data, normally
________also called a byte
1) : 4-bit
2) : 8-bit
3) : 6-bit
4) : 80-bit
Correct Option : 2 From : Lecture 1

Question # 6
The number of bits in a cell is called the cell width.______________
define the memory completely.
1) : Cell width and number of cells,
2) : cell number and width of the cells,
3) : width
4) : Height
Correct Option : 1 From : Lecture 1

Question # 7
for memory we define two dimensions. The first dimension defines how
many __________bits are there in a single memory cell.
1) : parallel
2) : Vertical
3) : long
4) : short
Correct Option : 1 From : Lecture 1

Question # 8
__________ operation requires the same size of data bus and memory cell width.
1) : Normal
2) : Best and simplest
3) : first
4) : None of the Given
Correct Option : 2 From : Lecture 1

Question # 9
Control bus is only the mechanism. The responsibility of sending the
appropriate signals on the control bus to the memory is of
the_________________.
1) : Data Bus
2) : processor
3) : Address Bus
4) : None of the Given
Correct Option : 2 From : Lecture 1
Question # 10
In “total: dw 0 ” Opcode total is a ___________
1) : Literal
2) : Variable
3) : Label
4) : Starting point
Correct Option : 3 From : Lecture 10

Question # 11
| 0 |--›| 1 | 1 | 0 | 1 | 0 | 0 | 0 | --›| C | is a example of ______
1) : Shl
2) : sar
3) : Shr
4) : Sal
Correct Option : 3 From : Lecture 10

Question # 12
| C |‹--| 1 | 1 | 0 | 1 | 0 | 0 | 0 | ‹--| 0 | is a example of ______
1) : Shl
2) : sar
3) : Shr
4) : Sal
Correct Option : 1 From : Lecture 10

Question # 13
ADC has _________ operands.
1) : two
2) : three
3) : Five
4) : Zero
Correct Option : 2 From : Lecture 10

Question # 14
The basic purpose of a computer is to perform operations, and
operations need ____________.
1) : order
2) : nothing
3) : operands
4) : bit
Correct Option : 3 From : Lecture 2

Question # 15
Registers are like a scratch pad ram inside the processor and their
operation is very much like normal______________.
1) : Number
2) : opreations
3) : memory cells
4) : None of the Given
Correct Option : 3 From : Lecture 2
Question # 16
There is a central register in every processor called the _______ and
The word size of a processor is defined by the width of its__________.
1) : accumulator,accumulator
2) : data bus,accumulator
3) : accumulator, Address Bus
4) : accumulator,memory
Correct Option : 1 From : Lecture 2

Question # 17
___________does not hold data but holds the address of data
1) : Pointer, Segment, or Base Register
2) : Pointer, Index, or Base Register
3) : General Registers
4) : Instruction Pointer
Correct Option : 2 From : Lecture 2

Question # 18
“The program counter holds the address of the next instruction to be
_____________”
1) : executed.
2) : called
3) : deleted
4) : copy
Correct Option : 1 From : Lecture 2
Question # 19
There are _____ types of “instruction groups”
1) : 4
2) : 5
3) : 3
4) : 2
Correct Option : 1 From : Lecture 2
Question # 20
These instructions are used to move data from one place to another.
1) : TRUE
2) : FALSE
3) :
4) :
Correct Option : 1 From : Lecture 2

Question # 21
“mov” instruction is related to the _______ Group.
1) : Arithmetic and Logic Instructions
2) : Data Movement Instructions
3) : Program Control Instructions
4) : Special Instructions
Correct Option : 2 From : Lecture 2

Question # 22
______________allow changing specific processor behaviors and are used
to play with it.
1) : Special Instructions
2) : Data Movement Instructions
3) : Program Control Instructions
4) : Arithmetic and Logic Instructions
Correct Option : 1 From : Lecture 2
Question # 23
8088 is a 16bit processor with its accumulator and all registers of __________.
1) : 32 bits
2) : 6 bits
3) : 16 bits
4) : 64 bits
Correct Option : 3 From : Lecture 2

Question # 24
The __________ of a processor means the organization and
functionalities of the registers it contains and the instructions that
are valid on the processor.
1) : Manufactures
2) : architecture
3) : Deal
4) : None of the Given
Correct Option : 2 From : Lecture 2
Question # 25
Intel IAPX88 Architecture is ___________
1) : More then 25 old
2) : New
3) : Not Good
4) : None of the Given
Correct Option : 1 From : Lecture 2

Question # 26
The iAPX88 architecture consists of______registers.
1) : 13
2) : 12
3) : 9
4) : 14
Correct Option : 4 From : Lecture 3
Question # 27
General Registers are ______________
1) : AX, BX, CX, and DX
2) : XA, BX, CX, and DX
3) : SS,SI and DI
4) : 3
Correct Option : 1 From : Lecture 3

Question # 28
AX means we are referring to the extended 16bit “A” register. Its
upper and lower byte are separately accessible as ________________.
1) : AH and AL
2) : A Lower and A Upper
3) : AL, AU
4) : AX
Correct Option : 1 From : Lecture 3

Question # 29
AX is General purpose Register where A stands for__________.
1) : Acadmic
2) : Ado
3) : Architecture
4) : Accumulator
Correct Option : 4 From : Lecture 3

Question # 30
The B of BX stands for _________because of its role in memory addressing.
1) : Busy
2) : Base
3) : Better
4) : None of the Given
Correct Option : 2 From : Lecture 3

Question # 31
The D of DX stands for Destination as it acts as the destination in
_____________________.
1) : I/O operations
2) : operations
3) : memory cells
4) : Memory I/O operations
Correct Option : 1 From : Lecture 3

Question # 32
The C of CX stands for Counter as there are certain instructions that
work with an automatic count in the ___________.
1) : DI register
2) : BX register
3) : CX register
4) : DX register
Correct Option : 3 From : Lecture 3

Question # 33
_________are the index registers of the Intel architecture which hold
address of data and used in memory access.
1) : SI and SS
2) : PI and DI
3) : SI and IP
4) : SI and DI
Correct Option : 4 From : Lecture 3

Question # 34
In Intel IAPX88 architecture ___________ is the special register
containing the address of the next instruction to be executed.
1) : AX
2) : PI
3) : IP
4) : SI
Correct Option : 3 From : Lecture 3

Question # 35
SP is a memory pointer and is used indirectly by a set of ____________.
1) : instructions
2) : Pointers
3) : Indexes
4) : Variables
Correct Option : 1 From : Lecture 3

Question # 36
___________is also a memory pointer containing the address in a
special area of memory called the stack.
1) : SP
2) : BP
3) : PB
4) : AC
Correct Option : 2 From : Lecture 3
Question # 37
____________is bit wise significant and accordingly each bit is named
separately.
1) : AX
2) : FS
3) : IP
4) : Flags Register
Correct Option : 4 From : Lecture 3

Question # 38
When two 16bit numbers are added the answer can be 17 bits long, this
extra bit that won’t fit in the target register is placed in the
__________where it can be used and tested
1) : carry flag
2) : Parity Flag
3) : Auxiliary Carry
4) : Zero Flag
Correct Option : 1 From : Lecture 3
Question # 39
Program is an ordered set of instructions for the processor.
1) : TRUE
2) : FALSE
3) :
4) :
Correct Option : 1 From : Lecture 3
Question # 40
For Intel Architecture “operation destination, source” is way of writing things.
1) : TRUE
2) : FALSE
3) :
4) :
Correct Option : 1 From : Lecture 3

Question # 41
Operation code “ add ax, bx ” ____________.
1) : Add the bx to ax and change the bx
2) : Add the ax to bx and change the ax
3) : Add the bx to ax and change the ax
4) : Add the bx to ax and change nothing
Correct Option : 3 From : Lecture 3

Question # 42
The maximum memory iAPX88 can access is________________.
1) : 1MB
2) : 2MB
3) : 3MB
4) : 128MB
Correct Option : 1 From : Lecture 4
Question # 43
The maximum memory iAPX88 can access is 1MB which can be accessed with
_______________.
1) : 18 bits
2) : 20 bits
3) : 16 bits
4) : 2 bits
Correct Option : 2 From : Lecture 4

Question # 44
_____________address of 1DED0 where the opcode B80500 is placed.
1) : physical memory
2) : memory
3) : efective
4) : None of the Given
Correct Option : 1 From : Lecture 4

Question # 45
16 bit of Segment and Offset Addresses can be converted to 20bit Address i.e
Segment Address with lower four bits zero + Offset Address with ______
four bits zero = 20bit Physical Address
1) : Middle
2) : lower
3) : Top
4) : upper
Correct Option : 4 From : Lecture 4

Question # 46
When adding two 20bit Addresses a carry if generated is dropped
without being stored anywhere and the phenomenon is called
address______.
1) : wraparound
2) : mode
3) : ping
4) : error
Correct Option : 1 From : Lecture 4

Question # 47
segments can only be defined a 16byte boundaries called _____________
boundaries.
1) : segment
2) : paragraph
3) : Cell
4) : RAM
Correct Option : 1 From : Lecture 4

Question # 48
in a Program CS, DS, SS, and ES all had the same value in them. This
is called _____________________.
1) : equel memory
2) : overlapping segments
3) : segments hidding
4) : overlapping SI
Correct Option : 2 From : Lecture 4

Question # 49
“db num1” size of the memory is _____________
1) : 1byte
2) : 4bit
3) : 16bit
4) : 2byte
Correct Option : 1 From : Lecture 5
Question # 50
“ 1------------[org 0x0100]
2------------mov ax, [num1] ; load first number in ax
3------------mov bx, [num2] ; load second number in bx
4------------add ax, bx _________________________________
5------------int 0x21
6------------
7------------num1: dw 5
8------------num2: dw 10


Comments for the 4 are :
1) : No comments Will be
2) : ; accumulate sum in add
3) : ; accumulate sum in ax
4) : ; accumulate sum in Bx
Correct Option : 3 From : Lecture 5

Question # 51
In “ mov ax, bx ” is _____________ Addressing Modes.
1) : Immediate
2) : Indirect
3) : Direct
4) : Register
Correct Option : 4 From : Lecture 5

Question # 52
In “mov ax, [bx] ” is _____________ Addressing Modes
1) : Based Register Indirect
2) : Indirect
3) : Base Indirect
4) : Immediate
Correct Option : 1 From : Lecture 5

Question # 53
In “mov ax, 5 ” is _____________ Addressing Modes
1) : Immediate
2) : Indirect
3) : Indirect
4) : Register
Correct Option : 1 From : Lecture 6

Question # 54
In “ mov ax, [num1+bx] ” is ___________ ADDRESSING
1) : OFFSET+ Indirect
2) : Register + Direct
3) : Indirect + Reference
4) : BASEd REGISTER + OFFSET
Correct Option : 4 From : Lecture 7

Question # 55
“base + offset addressing ” gives This number which came as the result
of addition is called the _______.
1) : Address
2) : mode
3) : effective address
4) : Physical Address
Correct Option : 3 From : Lecture 7

Question # 56
“mov ax, [cs:bx]” associates _________ for this one instruction
1) : CS with BX
2) : BX with CS
3) : BX with AX
4) : None of the Given
Correct Option : 2 From : Lecture 7

Question # 57
For example
BX=0100
DS=FFF0
And Opcode are;
move [bx+0x0100], Ax
now what is the effective memory address;
1) : 0020
2) : 0200
3) : 0300
4) : 0x02
Correct Option : 2 From : Lecture 7
Question # 58
For example
BX=0100
DS=FFF0
And Opcode are;
move [bx+0x0100], Ax
now what is the physical memory address;
1) : 0020
2) : 0x0100
3) : 0x10100
4) : 0x100100
Correct Option : 2 From : Lecture 7

Question # 59
In “ mov [1234], al ” is _____________ Addressing Modes.
1) : Immediate
2) : Indirect
3) : Direct
4) : Register
Correct Option : 3 From : Lecture 8

Question # 60
In “ mov [SI], AX ” is _____________ Addressing Modes.
1) : Basef Register Indirect
2) : Indirect
3) : Indexed Register Indirect
4) : Immediate
Correct Option : 3 From : Lecture 8

Question # 61
In “ mov ax, [bx - Si] ” is ___________ ADDRESSING
1) : Basef Register Indirect
2) : Indirect
3) : Direct
4) : illegal
Correct Option : 4 From : Lecture 8

Question # 62
In “ mov ax, [BL] ” there is error i.e. __________
1) : Address must be 16bit
2) : Address must be 8bit
3) : Address must be 4bit
4) : 8 bit to 16 bit move illegal
Correct Option : 4 From : Lecture 8

Question # 63
In “ mov ax, [SI+DI] ” there is error i.e. __________
1) : Two indexes can’t use as Memory Address
2) : index can’t use as Memory Address
3) : I don't Know
4) : None of the Given
Correct Option : 1 From : Lecture 8

Question # 64
In JNE and JNZ there is difference for only _____________;
1) : Programmer or Logic
2) : Assembler
3) : Debugger
4) : IAPX88
Correct Option : 1 From : Lecture 9

Question # 65
JMP is Instruction that on executing take jump regardless of the state
of all flags is called__________
1) : Jump
2) : Conditional jump
3) : Unconditional jump
4) : Stay
Correct Option : 3 From : Lecture 9
Question # 66
When result of the source subtraction from the destination is zero,
zero flag is set i.e. ZF=1
its mean that;
1) : DEST = SRC
2) : DEST != SRC
3) : DEST < SRC
4) : DEST > SRC
Correct Option : 1 From : Lecture 9
Question # 67
When an unsigned source is subtracted from an unsigned destination and
the destination is smaller, borrow is needed which sets the
____________.
1) : carry flag i.e CF = 0
2) : carry flag i.e CF = 1
3) : Carry Flag + ZF=1
4) : None of the Given
Correct Option : 2 From : Lecture 9
Question # 68
In the case of unassigned source and destination when subtracting and
in the result ZF =1 OR CR=1 then _______
1) : DEST = SRC
2) : DEST != SRC
3) : UDEST ? USRC
4) : DEST > SRC
Correct Option : 3 From : Lecture 9

Question # 69
In the case of unassigned source and destination when subtracting and
in the result ZF =0 AND CR=0 then _______
1) : DEST = SRC
2) : DEST != SRC
3) : UDEST < USRC
4) : UDEST > USRC
Correct Option : 4 From : Lecture 9
Question # 70
In the case of unassigned source and destination when subtracting and
in the result CR=0 then _______
1) : DEST = SRC
2) : DEST != SRC
3) : UDEST < USRC
4) : UDEST ? USRC
Correct Option : 4 From : Lecture 9
Question # 71
______This jump is taken if the last arithmetic operation produced a
zero in its destination. After a CMP it is taken if both operands were
equal.
1) : Jump if zero(JZ)/Jump if equal(JE)
2) : Jump if equal(JE)
3) : Jump if zero(JZ)
4) : No Jump fot This
Correct Option : 1 From : Lecture 9
Question # 72
_______This jump is taken after a CMP if the unsigned source is
smaller than or equal to the unsigned destination.
1) : JBE(Jump if not below or equal)
2) : JNA(Jump if not above)/JBE(Jump if not below or equal)
3) : JNA(Jump if not above)
4) : No Jump fot This
Correct Option : 2 From : Lecture 9
Question # 73
Numbers of any size can be added using a proper combination of __________.
1) : ADD and ADC
2) : ABD and ADC
3) : ADC and ADC
4) : None of the Given
Correct Option : 1 From : Lecture 11

Question # 74
Like addition with carry there is an instruction to subtract with
borrows called____________.
1) : SwB
2) : SBB
3) : SBC
4) : SBBC
Correct Option : 2 From : Lecture 11

Question # 75
if “and ax, bx” instruction is given, There are _____________
operations as a result
1) : 16 AND
2) : 17 AND
3) : 32 AND
4) : 8 AND
Correct Option : 1 From : Lecture 12

Question # 76
____________can be used to check whether particular bits of a number
are set or not.
1) : AND
2) : OR
3) : XOR
4) : NOT
Correct Option : 1 From : Lecture 12
Question # 77
__________can also be used as a masking operation to invert selective bits.
1) : AND
2) : OR
3) : XOR
4) : NOT
Correct Option : 3 From : Lecture 12

Question # 78
Masking Operations are Selective Bit ______________________
1) : Clearing, XOR, Inversion and Testing
2) : Clearing, Setting, Inversion and Testing
3) : Clearing, XOR, AND and Testing
4) : None of the Given
Correct Option : 2 From : Lecture 12

Question # 79
The ____________ instruction allows temporary diversion and therefore
reusability of code.
1) : CALL
2) : RET
3) : AND
4) : XOR
Correct Option : 1 From : Lecture 13

Question # 80
CALL takes a label as _____________ and execution starts from that label,
1) : argument
2) : Lable
3) : TXt
4) : Register
Correct Option : 1 From : Lecture 13

Question # 81
When the __________instruction is encountered and it takes execution
back to the instruction following the CALL.
1) : CALL
2) : RET
3) : AND
4) : XOR
Correct Option : 2 From : Lecture 13

Question # 82
_______________________ Both the instructions are commonly used as a
pair, however technically they are independent in their operation.
1) : RET and ADC
2) : Cal and SSb
3) : CALL and RET
4) : ADC and SSB
Correct Option : 3 From : Lecture 13

Question # 83
The CALL mechanism breaks the thread of execution and does not change
registers, except ____________.
1) : SI
2) : IP
3) : DI
4) : SP
Correct Option : 2 From : Lecture 13

Question # 84
Stack is a ______ that behaves in a first in last out manner.
1) : Program
2) : data structure
3) : Heap
4) : None of the Given
Correct Option : 2 From : Lecture 14

Question # 85
If ____________ is not available, stack clearing by the callee is a
complicated process.
1) : CALL
2) : SBB
3) : RET n
4) : None of the Given
Correct Option : 3 From : Lecture 14

Question # 86
When the stack will eventually become full, SP will reach 0, and
thereafter wraparound producing unexpected results. This is called
stack ________
1) : Overflow
2) : Leakage
3) : Error
4) : Pointer
Correct Option : 1 From : Lecture 14

Question # 87
The pop operation makes a copy from the top of the stack into
its_______________.
1) : Register
2) : operand
3) : RET n
4) : Pointer
Correct Option : 2 From : Lecture 14
Question # 88
_______________decrements SP (the stack pointer) by two and then
transfers a word from the source operand to the top of stack
1) : PUSH
2) : POP
3) : CALL
4) : RET
Correct Option : 1 From : Lecture 14

Question # 89
POP transfers the word at the current top of stack (pointed to by SP)
to the destination operand and then __________ SP by two to point to
the new top of stack.
1) : increments
2) : dcrements
3) : ++
4) : --
Correct Option : 1 From : Lecture 14

Question # 90
The trick is to use the ________and ___________operations and save the
callers’ value on the stack and recover it from there on return.
1) : POP, ADC
2) : CALL, RET
3) : CALL, RET n
4) : PUSH, POP
Correct Option : 4 From : Lecture 14
Question # 91
To access the arguments from the stack, the immediate idea that
strikes is to __________ them off the stack.
1) : PUSH
2) : POP
3) : CALL
4) : Rrgister
Correct Option : 2 From : Lecture 15

Question # 92
push bp
we are ________________
1) : sending bp copy to stack
2) : making bp copy from stack
3) : pushing bp on the stack
4) : doing nothing
Correct Option : 3 From : Lecture 15
Question # 93
Local Variables means variables that are used within the ___________________
1) : Subroutine
2) : Program
3) : CALL
4) : Label
Correct Option : 1 From : Lecture 15

Question # 94
Standard ASCII has 128 characters with assigned numbers from ________.
1) : 1to 129
2) : 0 to 127
3) : 0 to 128
4) : None of the Given
Correct Option : 2 From : Lecture 16

Question # 95
When _______ is sent to the VGA card, it will turn pixels on and off
in such a way that a visual representation of ‘A’ appears on the
screen.
1) : 0x60
2) : 0x90
3) : 0x30
4) : 0x40
Correct Option : 4 From : Lecture 16

Question # 96
Which bit is refer to the Blinking of foreground character
1) : 6
2) : 7
3) : 5
4) : 3
Correct Option : 2 From : Lecture 16

Question # 97
Which bit is refer to the Intensity component of foreground color
1) : 4
2) : 5
3) : 3
4) : 7
Correct Option : 3 From : Lecture 16
Question # 98
Which bit is refer to the Green component of background color
1) : 1
2) : 5
3) : 3
4) : 7
Correct Option : 2 From : Lecture 16

Question # 99
Which bit is refer to the Green component of foreground color
1) : 1
2) : 5
3) : 3
4) : 7
Correct Option : 1 From : Lecture 16

Question # 100
String can be indicate bye given
1) : db 0x61, 0x61, 0x63
2) : db 'a', 'b', 'c'
3) : db 'abc'
4) : All of the above
Correct Option : 4 From : Lecture 16

Question # 101
The first form divides a 32bit number in DX:AX by its 16bit operand
and stores the ___________ quotient in AX
1) : 16bit
2) : 17bit
3) : 32bit
4) : 64bit
Correct Option : 1 From : Lecture 17

Question # 102
The ___________ (division) used in the process is integer division and
not floating point division.
1) : DIV instruction
2) : ADC instruction
3) : SSB instruction
4) : DIVI instruction
Correct Option : 1 From : Lecture 17

Question # 103
______________(multiply) performs an unsigned multiplication of the
source operand and the accumulator.
1) : Multi
2) : DIV
3) : MUL
4) : Move
Correct Option : 3 From : Lecture 18

Question # 104
The desired location on the screen can be calculated with the
following formulae.
1) : location = ( hypos * 80 + SP ) * 3
2) : location = ( hypos * 80 + slocation ) * 2
3) : location = ( hypos * 80 + epos ) * 2
4) : None of the Given
Correct Option : 3 From : Lecture 18

Question # 105
To play with string there are 5 instructions that are __________
1) : STOS, LODS, CMPS, SCAS, and MOVS
2) : MUL, DIV, ADD, ADC and MOVE
3) : SSB, ADD, CMPS, ADC, and MOVS
4) : None of the Given
Correct Option : 1 From : Lecture 18
Question # 106
_______transfers a byte or word from register AL or AX to the string
element addressed by ES:DI and updates DI to point to the next
location.
1) : LODS
2) : STOS
3) : SCAS
4) : MOVE
Correct Option : 2 From : Lecture 18

Question # 107
____________ transfers a byte or word from the source location DS:SI
to AL or AX and updates SI to point to the next location.
1) : LODS
2) : STOS
3) : SCAS
4) : MOVE
Correct Option : 1 From : Lecture 18
Question # 108
_______compares a source byte or word in register AL or AX with the
destination string element addressed by ES: DI and updates the flags.
1) : LODS
2) : STOS
3) : SCAS
4) : MOVE
Correct Option : 3 From : Lecture 18

Question # 109
____________ repeat the following string instruction while the zero
flag is set and REPNE or REPNZ repeat the following instruction while
the zero flag is not set.
1) : REP or REPZ
2) : REPE or REPZ
3) : REPE or RPZ
4) : RPE or REPZ
Correct Option : 2 From : Lecture 18
Question # 110
LES loads ______________
1) : ES
2) : DS
3) : PS
4) : LS
Correct Option : 1 From : Lecture 20

Question # 111
LDS loads_______.
1) : ES
2) : DS
3) : PS
4) : LS
Correct Option : 2 From : Lecture 20

Question # 112
REP allows the instruction to be repeated ____________ times allowing
blocks of memory to be copied.
1) : DX
2) : CX
3) : BX
4) : AX
Correct Option : 2 From : Lecture 20

Question # 113
___________pops IP, then CS, and then FLAGS.
1) : Ret n
2) : REZA
3) : REPE
4) : IRET
Correct Option : 4 From : Lecture 21

Question # 114
________ , Trap, Single step Interrupt
1) : INT 0
2) : INT 1
3) : INT 3
4) : INT 0
Correct Option : 2 From : Lecture 21

Question # 115
_________,NMI-Non Maskable Interrupt
1) : INT 0
2) : INT 1
3) : INT 3
4) : INT 0
Correct Option : 3 From : Lecture 21

Question # 116
To hook an interrupt we change the _________ corresponding to that interrupt.
1) : SX
2) : vector
3) : AX
4) : BX
Correct Option : 2 From : Lecture 22
Question # 117
___________pops IP, then CS, and then FLAGS.
1) : Ret n
2) : REZA
3) : REPE
4) : IRET
Correct Option : 4 From : Lecture 21

Question #118
________ , Trap, Single step Interrupt
1) : INT 0
2) : INT 1
3) : INT 3
4) : INT 0
Correct Option : 2 From : Lecture 21

Question #119
_________,NMI-Non Maskable Interrupt
1) : INT 0
2) : INT 1
3) : INT 3
4) : INT 0
Correct Option : 3 From : Lecture 21

Question # 120
To hook an interrupt we change the _________ corresponding to that interrupt.
1) : SX
2) : vector
3) : AX
4) : BX

1. Assembly language is not a low level language.
a. True
b. False

2. In case of COM File first command parameter is stored at ______ offset of program
segment prefix.
a. 0x80 (Not Confirm)
b. 0x82
c. 0x84
d. 0x86

3. Address always goes from
a. Processor to meory
b. Memory to processor
c. Memory to memory
d. None of the above

4. The sourse register in OUT is
a. AL or AX
b. BL or BX
c. CL or CX
d. DL or DX

5. By default CS is associated with
a. SS
b. BP
c. CX
d. IP

6. Which of the following pins of parallel port are grounded
a. 10-18
b. 18-25
c. 25-32
d. 32-39

7. In the instruction mov word [es:160], 0x1230, 30 represents the character
a. A
b. B
c. 0
d. 1

8. On executing 0x21 0x3D, if file cant be opened then
a. CF will contain 1
b. CF will contain 0
c. ZF will contain 1
d. ZF will contain 0

9. Which of the following IRQ is cascading interrupt
a. IRQ 0
b. IRQ 1
c. IRQ 2
d. IRQ 3

10. The execution of instruction mov word [es:160], 0x1230, will print a character on the
screen at
a. First column of second row
b. Second column of first row
c. Second column of second row
d. First column of third row

======================================

1)))SHR and SAL are same?
.True (correct)
.False
2)))mov ax,0 will set ZF flag
.True
.False
3)))In 9 pin DB connector ,which pic is assigned to TD.
.       1
.       2
.       3(correct)
.       4
4)))Lower 16 bits of EAX are labeled as
. AX(correct)
. BX
.EAX
.none of above
5))) which is the special prefix used for repeating a block
.rep(correct)
.repeat
.repb
.repe
6)) JA can not after cmp if unsigned destinition is greater than
source
.true
.false

Q=1

Conditional jump can only:

1.                        Far

2.                        short

3.                        near

4.                        all of the given

q=2:

Address is always go from:

1.                        Processor to memory

2.                        Memory to processor

3.                        Memory to memory

4.                        None of given

Q=3;

Programmable interrupt controllers have two ports 20 and 21……port 20 is a control port while port 21 is ………..

1.                        The interrupt make register

2.                        Interrupt port

3.                        Output port

4.                        Input port

Q=4:

In the instruction “move word[es:160],0x1230 represent the charechter…………

1.                        A

2.                        B

3.                        0

4.                        1

Q=5:

The 8088 processor divides interrupts into how many classes?

1.                        2

2.                        3

3.                        4

4.                        5

Q=6:

Which of the following is the pair of register used to access memory in string instruction?

1.                        DI and BP

2.                        SI and BP

3.                        DI and SI

4.                        DS and SI

Q=7:

In case of COM file,first command line parameter is stored at ………..offset of program segment prefix’

1.                        0x80

2.                        0x82

3.                        0x84

4.                        0x86

Q=8:

The INT 0x13 service 0x03 is use to …

1.                        Read disk sector

2.                        Write disk sector

3.                        Reset disk sector

4.                        Get drive parameters

Q=9:

After the execution of STOSWB,the CX wil be……..

1.                        Incremented by 1

2.                        Incremented by 2

3.                        Decremented by 1

4.                        Decremented by 2

Q=10

The execution of the instruction “mov word [ES:160],0x1230”will print a character on the screen at:

1.                        First column of second row

2.                        Second column of first row

3.                        Second column of second row

4.                        First column of third row